PCB Trace Width Calculator

A PCB trace is a thin strip of copper, so it has resistance, and every amp you push through it dissipates I²R as heat. A narrower trace has more resistance and less surface area to shed that heat, so it runs hotter. For power rails, motor drives, heaters, LED strings and battery paths, the design question is therefore: how hot am I willing to let this trace get above ambient (the temperature rise, ΔT), and what cross-section does that require? Divide the cross-section by the copper thickness and you have the minimum width. IPC-2221, the generic standard on printed board design, publishes curve-fit equations for exactly this, and they remain the most widely used rule in PCB tools and online calculators.

I = k × ΔT^0.44 × A^0.725
A = ( I / (k × ΔT^0.44) )^(1/0.725)          [mil²]
W = A / t                                     [mil]
R = ρ × L / (W × t)
ρ(T) = 1.724×10⁻⁸ × (1 + 0.00393 × (T − 20))  [Ω·m]

Note the units: the IPC-2221 constants are fitted for area in square mils, so the calculator works in mils internally and converts. Copper weight is specified in ounces per square foot: 0.5 oz ≈ 0.69 mil (17.5 µm), 1 oz ≈ 1.38 mil (35 µm), 2 oz ≈ 2.76 mil (70 µm), 3 oz ≈ 4.13 mil (105 µm). The internal-layer constant is half the external one because a buried trace can only lose heat by conduction through the laminate, while an outer trace also convects and radiates to the air.

Worked example (imperial)

You need to carry 2 A on an outer layer of a board with 1 oz copper and you'll accept a 10 °C rise. A = (2 / (0.048 × 10^0.44))^(1/0.725) ≈ 42.4 mil². Dividing by 1.378 mil gives W ≈ 30.8 mil (0.78 mm). On an inner layer the same current needs about 80 mil (2.03 mm) — 2.6 times wider. If that 30.8 mil trace is 2 inches (50.8 mm) long, its resistance at 35 °C is about 34 mΩ, so it drops roughly 68 mV and dissipates about 0.14 W. Move to 2 oz copper and the outer-layer width halves to about 15 mil.

For a feel of scale: at a 10 °C rise on 1 oz external copper, IPC-2221 gives roughly 0.9 A for a 10 mil trace, 1.5 A for 20 mil, 2.8 A for 50 mil and 4.7 A for 100 mil. A 100 mil × 1 oz trace has a cross-section of about 175 circular mils — between 28 AWG (160 cmil) and 27 AWG (202 cmil) wire — which is a useful sanity check: a 2 oz trace that wide is comparable to roughly 25 AWG, and would not be expected to carry what a 14 AWG power lead does. A handy number for resistance: 1 oz copper is about 0.5 mΩ per square at room temperature, so a 10 mil wide, 1 inch long trace (100 squares) is about 50 mΩ.

The IPC-2221 curves trace back to measurements made by the US National Bureau of Standards in the 1950s, carried forward through IPC-D-275. IPC-2152, 'Standard for Determining Current Carrying Capacity in Printed Board Design', published in 2009, replaced that data with a new set of measurements and showed that the board itself matters a great deal: board thickness, the presence and distance of copper planes, laminate thermal conductivity and how the board is mounted all change the temperature rise for the same trace. IPC-2152 handles these with a baseline chart plus correction factors. One headline finding is that the IPC-2221 internal-layer curve is overly conservative — in many real boards an internal trace runs about as cool as an external one, because the surrounding laminate and planes spread heat well.

This calculator implements the IPC-2221 equations only, because they are simple, universally recognized and generally on the safe side for internal layers. For external traces on thin boards without nearby planes, or whenever your margins are tight (high-current, high-ambient, or compact designs), check the result against the IPC-2152 charts or run a thermal simulation. The calculator warns when you go outside the range the IPC-2221 curves were built for: up to 35 A external / 17.5 A internal, 10–100 °C rise, widths up to 400 mil and 0.5–3 oz copper.

• Sizing the trace but not the bottleneck: a narrow neck at a connector pad, a thermal relief spoke or a single via can carry far less than the trace. The narrowest point in the current path is what counts.
• Forgetting the vias: when a high-current net changes layers, use several vias in parallel. Via barrel plating is typically thinner than the surface copper (often around 1 mil / 25 µm).
• Assuming nominal copper thickness: outer layers gain thickness from plating, while inner layers can finish thinner than nominal within IPC-4562 tolerances. Ask your fabricator for finished thickness.
• Treating ΔT as the absolute temperature: a 20 °C rise in a 60 °C enclosure puts the trace at 80 °C. Check that against the laminate's Tg and nearby components' ratings.
• Ignoring voltage drop: a trace can be thermally fine yet drop enough voltage to upset a low-voltage rail or a current-sense measurement. Use the length field to check.

Above a few amps, a copper pour usually beats a trace for both resistance and heat, and repeating the same net on several layers stitched with vias multiplies the cross-section. Heavier copper (2 oz and up) halves the required width but makes fine-pitch spacing harder and raises fabrication cost, so consider widening only the power section first. Always state copper weight for outer and inner layers explicitly in your fabrication notes. At KEMI we check current paths, neck-downs and via counts during layout, and copper weight is an option in our PCB fabrication quote.