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Circuit Design Reference
Choosing pull-up/pull-down resistors, input voltage and heat calculations for three-terminal regulators (78XX/79XX), and NE555 astable/monostable timer formulas. Three representative sheets excerpted from KEMI Circuit Design Reference Vol.1 & 2 (printable sheets); formulas and worked figures are transcribed as published.
Excerpt 1 · Vol.1
Pull-up, Pull-down & Open Collector
With a pull-up vs without
| Configuration | With pull-up | No pull-up (open) | Result |
|---|---|---|---|
| TTL input open | solid HIGH ≈ VCC | floats to ≈ 1.4–1.6 V, reads HIGH, but flips easily | works, but unreliable — tie it off |
| CMOS input open | solid HIGH ≈ VCC | undefined. P and N sit half-on → shoot-through, heat | always tie to VCC or GND |
| Open-collector output | HIGH ≈ VCC / LOW ≈ 0.2–0.4 V | no HIGH at all. Transistor off = pin floating (hi-Z) | unusable without a pull-up |
Pull-up resistor value
Trade-offs matter more than the exact value
| Value | Current draw | Rise speed | Where it fits |
|---|---|---|---|
| Small (few hundred Ω–1 kΩ) | high — flows whenever output is LOW | fast | fast signals, long traces, noise |
| Medium (2.2–10 kΩ) | moderate | moderate | general logic, switch inputs — default |
| Large (47–100 kΩ) | low | slow | low-power, low-speed, CMOS only |
Isink = (VCC − VOL) / R · trise ≈ 2.2·R·C — at 5 V, VOL 0.4 V → 1 kΩ 4.6 mA · 4.7 kΩ 0.98 mA · 10 kΩ 0.46 mA / with 50 pF → 1 kΩ ≈110 ns · 10 kΩ ≈1.1 µs
Pull-up or pull-down?
One question — what state should the line hold when nothing happens?
- · Pull-up: idle HIGH, pressed LOW. For LOW-only drivers (open collector, I²C) there is no alternative.
- · Pull-down: idle LOW, pressed HIGH. For reset and enable — must not switch on by accident.
- · For safety signals, pick the idle state that is safe when the wire breaks.
Caution: never parallel two totem-pole outputs — one HIGH against one LOW and current pours from VCC to GND, cooking both. Tie outputs together only with open-collector (or three-state) parts.
Excerpt 2 · Vol.1
78XX / 79XX Voltage Regulators
One rule that covers both families
Pin 1 = the highest voltage, pin 2 = the lowest voltage, pin 3 = always the output. 78XX (+12 / 0 / +5 V): the highest, +12 V, is pin 1 (input); the lowest, 0 V, is pin 2 (ground). 79XX (0 / −12 / −5 V): the highest, 0 V, is pin 1 (ground); the lowest, −12 V, is pin 2 (input). Printed face toward you, leads pointing down, count 1·2·3 from the left.
Current rating by series
| Part | Max current | Polarity | Package |
|---|---|---|---|
| 78LXX | 100 mA | pos. (+) | TO-92 |
| 78MXX | 500 mA | pos. (+) | TO-220 |
| 78XX | 1.5 A | pos. (+) | TO-220 |
| 79LXX | 100 mA | neg. (−) | TO-92 |
| 79MXX | 500 mA | neg. (−) | TO-220 |
| 79XX | 1.5 A | neg. (−) | TO-220 |
The last two digits are the output voltage — 7805 = +5 V, 7912 = −12 V. Ratings assume adequate heat sinking; packages vary by maker.
Input voltage and heat
Vin > Vout × √2 (√2 = 1.41421) · Ploss = (Vin − Vout) × Iout
| Part | Output | Min. input (Vout×√2) | Recommended | IC loss at 15 V in · 500 mA |
|---|---|---|---|---|
| 7805 | +5 V | 7.07 V | 8 – 12 V | 5.00 W (15−5)×0.5 |
| 7809 | +9 V | 12.73 V | 13 – 16 V | 3.00 W (15−9)×0.5 |
| 7812 | +12 V | 16.97 V | 17 – 20 V | 1.50 W (15−12)×0.5 |
| 7815 | +15 V | 21.21 V | 22 – 25 V | will not run — 15 V < 21.21 V min. |
79XX is identical with the sign reversed (a 7912 needs an input below −16.97 V). An unheatsinked TO-220 typically trips its thermal protection around 2 W. Taking 5 V at 500 mA from 15 V dumps 5 W as heat — without a heat sink the protection trips and the output cuts out.
Why capacitors go on both sides
- · Input, large (electrolytic) — fills ripple and load-step sag, stabilising the input. Dip below the minimum even briefly and the output collapses with it.
- · Output, small (ceramic) — stops the feedback loop ringing on load steps, preventing oscillation. Mount it at the IC pins.
Typical: 0.33 ㎌ in, 0.1 ㎌ out. The bulk smoothing electrolytic sits at the rectifier, separately. Caution — 79XX pin order differs from 78XX (pin 1 is ground, pin 2 is the input). Fit one with 78XX habits and it is destroyed the moment you apply power.
Excerpt 3 · Vol.2
NE555 Astable & Monostable
f = 1.44 / ((Ra + 2Rb)·C) · duty = (Ra + Rb) / (Ra + 2Rb) · monostable T = 1.1·R·C
Where 0.693 and 1.1 come from — in astable mode the capacitor only travels between ⅓ and ⅔VCC, and on both phases exactly half the remaining distance is covered, so t = RC·ln2 = 0.693RC and the coefficient in f = 1/T is 1/ln2 = 1.443 ≈ 1.44. The monostable starts at 0 V and stops at ⅔VCC, leaving one third — t = RC·ln3 = 1.0986RC ≈ 1.1RC.
Astable worked examples
tH = 0.693(Ra+Rb)C · tL = 0.693·Rb·C
| Ra | Rb | C | Charge tH | Disch. tL | Period T | Freq. f | Duty |
|---|---|---|---|---|---|---|---|
| 47 kΩ | 100 kΩ | 10 µF | 1.019 s | 693 ms | 1.712 s | 0.58 Hz | 59.5 % |
| 10 kΩ | 10 kΩ | 10 µF | 138.6 ms | 69.3 ms | 207.9 ms | 4.81 Hz | 66.7 % |
| 1 kΩ | 10 kΩ | 10 µF | 76.2 ms | 69.3 ms | 145.6 ms | 6.87 Hz | 52.4 % |
| 4.7 kΩ | 4.7 kΩ | 1 µF | 6.52 ms | 3.26 ms | 9.77 ms | 102 Hz | 66.7 % |
| 10 kΩ | 47 kΩ | 0.01 µF | 395 µs | 326 µs | 721 µs | 1.39 kHz | 54.8 % |
With Ra=Rb the duty is always 66.7% — only the ratio sets the duty cycle.
Monostable pulse (T = 1.1·R·C)
| R | C | Output pulse T |
|---|---|---|
| 10 kΩ | 1 µF | 11 ms |
| 10 kΩ | 10 µF | 110 ms |
| 47 kΩ | 10 µF | 517 ms |
| 220 kΩ | 10 µF | 2.42 s |
| 1 MΩ | 10 µF | 11 s |
Rb/Ra ratio vs duty
| Rb / Ra | 1 | 2 | 5 | 10 | 100 |
|---|---|---|---|---|---|
| Duty | 66.7 % | 60.0 % | 54.5 % | 52.4 % | 50.2 % |
Duty converges on 50% but never reaches it. Mind the direction: shrink Ra.
Watch out
- · The standard astable can never go below 50% duty — charging runs through Ra+Rb, discharging through Rb alone. Nor can Ra shrink without limit (on discharge the pin-7 transistor must sink the whole VCC/Ra current). Keep Ra ≥ 1 kΩ.
- · A monostable ignores retriggering before its pulse ends — pulling pin 2 low again while the output is HIGH does nothing.
- · At low frequencies the arithmetic stops matching — bulk electrolytics leak, so the time to ⅔VCC comes out longer than calculated or is never reached, and tolerance is around ±20%. Do not use a 555 for timers of minutes or more.
This document is an excerpt
The full PDF editions of the Circuit Design Reference include rectifier · smoothing · voltage-doubler circuits, clippers and clampers, BJT/FET logic gates, op-amp amplifiers and oscillators, flip-flops and counter design procedures — 40+ printable sheets plus practice worksheets.
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What pull-up resistor value should I use?
For general logic and switch inputs, 2.2–10 kΩ is the default. Drop to a few hundred Ω–1 kΩ for fast signals, long traces or noisy environments (at the cost of current draw), or go up to 47–100 kΩ for low-power, low-speed CMOS-only lines. Check with Isink = (VCC − VOL) / R and rise time t ≈ 2.2·R·C.
What is the minimum input voltage for a 7805?
Minimum input = output × √2, so a 7805 needs at least 7.07 V; the recommended input is 8–12 V. A higher input is more stable, but every volt above the output becomes heat inside the IC — Ploss = (Vin − Vout) × Iout. Clear the minimum, but go no higher than you need.
Why can't a standard NE555 astable reach 50% duty cycle?
Charging runs through Ra+Rb while discharging runs through Rb alone, so charging is always longer. Growing Rb only converges on 50% without reaching it; the right direction is shrinking Ra — but keep Ra ≥ 1 kΩ, because on discharge the pin-7 transistor must sink the whole VCC/Ra current.
This document is an excerpt of KEMI's own reference material and an unofficial study reference. 74-series, 78XX/79XX and NE555 part numbers are trademarks of their respective semiconductor manufacturers; all trademarks are the property of their respective owners. Resistor and current figures are worked examples — check the datasheet for a real design.